From size to speed
Huawei’s τ Scaling Law and The Thermodynamic Edge in a Time of Monsters
Preface: Huawei, one of China’s leading technology development companies, announced the τ (Tau) Scaling Law, a new metric to evaluate improvements in the semiconductor industry. This short essay is a quick response to this announcement, and seeks to consider what this means from the perspective of thermoeconomics and issues related to information viability.
In the shadow of escalating geopolitical tensions and resource constraints, Huawei’s announcement on May 25, 2026, at the IEEE International Symposium on Circuits and Systems (ISCAS) in Shanghai marks more than a technical milestone. By unveiling the τ (Tau) Scaling Law, the company is reframing semiconductor progress around minimising time constants — signal propagation delays, data movement, and execution efficiency — rather than relentless geometric shrinkage. This pivot from size to compute/energy/time as the defining metric is not mere adaptation to U.S. export controls. It represents a deeper alignment with the physical realities that will determine long-term information viability in an era of thermodynamic limits.
For decades, Moore’s Law and Dennard Scaling guided the industry: pack more transistors into smaller spaces, drive down costs, and reap performance gains. Those paradigms are fraying under atomic limits, economic pressures, and power walls. Huawei, led by semiconductor president He Tingbo, proposes replacing geometric scaling with time-domain optimisation. The τ Scaling Law targets the RC (resistance-capacitance) delays that dominate both latency and energy waste. Through innovations like LogicFolding — which “folds” logic circuits to shorten interconnects — and full-stack co-optimisation from devices to systems, the company claims substantial gains: up to 41% better energy efficiency in mobile SoCs, 55% higher effective density on existing nodes and a path to 1.4nm-equivalent transistor density by 2031. Over six years, these principles have already informed 381 mass-produced chips, with new Kirin processors arriving this northern hemisphere autumn.
The power dissipation focus here is critical. Dynamic power scales with capacitance and voltage squared; static leakage and interconnect losses add further burdens. By systematically reducing τ, Huawei attacks these at their root: shorter paths mean less parasitic capacitance, lower resistive heating and more operations per joule. In a world where AI data centres are projected to consume hundreds of additional terawatt-hours annually by 2030 — potentially rivalling entire nations’ electricity use — this is no incremental tweak. It is a strategic response to the hard thermodynamic ceiling facing compute-intensive economies.
This shift resonates profoundly with thermoeconomic principles. As outlined in my book Thermoeconomics in a Time of Monsters, complex systems — economies, civilisations and technological ecosystems — thrive or falter based on their capacity to generate negentropy: order, information processing, and adaptive organisation extracted from energy flows while managing entropy production. Information is not free. Its viability hinges on the efficiency of converting energy into useful work over time. High τ means more energy dissipated as useless heat; low τ amplifies net negentropic yield. Compute/energy/time becomes the decisive threshold for sustained performance.
Huawei’s approach operationalises this. It decouples progress from exclusive reliance on the most advanced lithography tools (increasingly restricted by geopolitics) and emphasises architectural and systemic efficiency. This is engineering as applied thermodynamics: minimise dissipative losses to maximise the surplus available for complexity and innovation. In thermoeconomic terms, it enhances the “profitability” of information systems — where benefits (negentropic output in the form of faster decisions, denser intelligence and better control loops) exceed the energetic and entropic costs.
The implications for energy sovereignty and resilience are immediate and asymmetric. China enters this contest with a structural advantage in electricity. As of early 2026, China boasts among the world’s lowest power generation costs, driven by scale in renewables (solar installation costs projected to fall toward $388/kW by 2030), abundant domestic coal reserves for baseload stability, and centralised planning that treats energy as critical infrastructure rather than a volatile market commodity. Chinese electricity prices are roughly half those in the U.S. in many contexts, with far greater stability.
This matters enormously. AI and high-performance computing are voracious. Global data centre electricity demand, already around 415 TWh in 2024, could more than double by 2030, with AI workloads driving much of the surge. In the United States and Europe, power grid constraints (such as those caused by shortages in transformers), permitting delays, public opposition and higher marginal costs from gas volatility or renewable intermittency (without equivalent scale) create bottlenecks. China’s ability to deploy low-cost, reliable power at volume — bolstered by manufacturing dominance in solar, batteries and related supply chains — turns energy abundance into a competitive multiplier, as I have previously discussed.
Lower effective compute costs, achieved through τ-optimised architectures, amplify this edge. Efficient chips stretch every kilowatt-hour further. For data centers, edge devices, autonomous systems, and industrial intelligence, this translates into lower operational expenses, reduced thermal management burdens, and greater deployment flexibility. In a fragmented world — marked by supply chain weaponisation, “monsters” of geopolitical rivalry, resource nationalism and climate pressures — nations or blocs that master compute/energy/time ratios gain systemic resilience. They can sustain denser information flows, faster innovation cycles, and more robust coordination without collapsing under self-generated entropy (heat, cost and fragility).
Critics may dismiss this as catch-up innovation under duress. Huawei’s path is undeniably shaped by sanctions limiting access to EUV lithography. Yet necessity has mothered invention before. The West’s focus on bleeding-edge nodes, while powerful, risks over-optimisation for a narrow metric (feature size) while ignoring broader thermodynamic and economic realities. Architectural leaps like those in τ Scaling can deliver meaningful PPA (power-performance-area) gains even on mature processes. Early claims of clock speed uplifts alongside efficiency improvements suggest real-world traction.
Broader questions loom, however, and are worth bearing in mind. Validation through independent benchmarks on the upcoming Kirin chips will be essential. I doubt that Huawei would have made the announcement on Tau’s law if it wasn’t confident of passing such validation. Thermal challenges in folded architectures require careful management. Design complexity rises, demanding sophisticated EDA tools and talent — areas where China continues heavy investment. Yet the direction is clear: post-Moore progress will increasingly favour those who engineer within physical constraints rather than against them.
For the global order, this accelerates a multipolar technology landscape. Energy sovereignty — control over affordable and reliable power — becomes as strategic as chip fabrication itself. Nations investing in both efficient compute paradigms and domestic energy scale (renewables + firm capacity) position themselves for advantage. Those mired in regulatory gridlock or high-cost energy risk ceding ground in AI, advanced manufacturing, and future intelligence applications.
In Thermoeconomics in a Time of Monsters, the core insight is that systemic viability in turbulent times demands reckoning with energy-entropy-information linkages. Huawei’s τ Scaling Law is a practical demonstration. By prioritising time- and energy-domain optimisations, it lowers the thermodynamic cost of computation and leverages China’s electricity strengths. This does not guarantee dominance, but it tilts the field toward resilience for systems that align design with physics.
The monsters of our era — fragmentation, scarcity mindsets and power competitions — will not be tamed by denial of limits. They yield to those who navigate them intelligently. Reframing semiconductor futures around compute/energy/time is one such intelligent navigation. It signals that the next phase of technological competition will be won not solely by those who build the smallest transistors, but by those who most effectively convert (scarce) energy into enduring negentropic order.
The coming years will test this thesis in silicon, post-silicon technologies and on the grid. For policymakers, strategists and technologists, the message is that energy abundance paired with computational efficiency is the foundation of sovereignty in the information age. Ignore it at your peril.






Here's a few missed pieces to why it doesn't matter if 'the world' accepts China's proposed measuring stick or not, China owns the future of the computational sector for the foreseeable future.
Benchmarks may dominate corporate investments in development, but cost/benefit analysis rules corporate usage decisions.
And China's AI sector has already shaken the AI industry by understanding this, as the introduction of Deepseek, a cheaper but equally useful AI that doesn't bench test as well.
Better technology doesn't matter if nobody is producing wanted content for it.
I'm old enough to remember when VHS and Betamax were the only way to get the video content you wanted, at the time you wanted.
Betamax was better in every benchmark, but VHS had the content and was good enough. VHS won the market.
And right now, NVIDIA has the content because almost every AI is designed to run on its chips. The one exception is the newest version of Deepseek, which benchmarks slower, and runs on those new Chinese chips.
But there's about to be a sudden sustained shortage of NVIDIA chips (the petrochemical shock of America's war on Iranians is working up the supply chains for the cleaners used in NVIDIA factories) that won't be the case for China's chipmakers.
China's data centers aren't facing hurdles getting built, because they're being built in places that avoid those hurdles.
Building a data center literally inside a high mountain region's flood control dam avoids the eyesore/energy hog/water siphon issues, because the obvious benefit of a dam overcomes the esthetics issues, the loss of electrical supply capacity is theoretical because it is occurring right at the new source of electrical supply, and the water needed to carry away heat is part of the controlled flow the dam was built to supply.
And finally, the fundamental scientific research that will produce the next disruptor for the computational sector is mostly happening in China's universities and 'garages', and be first produced by a Chinese manufacturer because small scale production lines are normal for Chinese manufacturing, as is quick scaling up to meet global demand.
Modern digital systems have high energy demands that scale with computing power, while modern analog (and neuromorphic) systems show orders of magnitude higher energy efficiency in specific tasks like AI or signal processing.
Currently, analog computing is experiencing a renaissance specifically because of the energy limits faced by traditional digital architectures. Below is a detailed comparison of both approaches regarding energy consumption.
Main Differences in Energy Demands
Feature / System
Digital Computing Systems
Modern Analog (Neuromorphic) Systems
Operating Principle
Manipulation of discrete states ($0$ and $1$)
Utilization of continuous physical quantities (current, voltage)
Energy Efficiency
Low in complex AI tasks (von Neumann bottleneck)
Extremely high (computations occur directly where data is stored)
Idle Consumption
Relatively high (constant clocking and power needed)
Near zero (when utilizing non-volatile elements)
Performance Scaling
Linear to exponential power growth with frequency
Excellent for parallel matrix operations
1. Digital Systems and Their Energy Limitations
Modern digital computers are hitting their physical and energy limits. The key factors behind their high power consumption include:
Von Neumann Bottleneck: Traditional architecture separates the processor from the memory. Constantly moving data between memory and the CPU consumes up to 80% of the total energy of a digital chip.
Parasitic Capacitance Charging: Every switch of a transistor between logical $0$ and $1$ requires charging or discharging microscopic wires. This generates heat and energy losses.
High Clock Frequencies: As processor frequency increases, power consumption grows non-linearly. This requires complex, energy-hungry cooling systems.
2. Modern Analog Systems and the Energy Renaissance
Modern analog computers (often called neuromorphic or In-Memory Computing) do not work with ones and zeros. Instead, they use fundamental laws of physics (like Kirchhoff's current laws) to execute mathematical operations, such as matrix multiplication, instantly.
In-Memory Computing: Memory elements (e.g., memristors) serve as both the storage and the computing node at the same time. This eliminates the energy-expensive transfer of data.
Physical Addition: Joining several current paths into a single node sums the values instantly with zero extra energy consumption.
Real-Time Zprocessing: Analog circuits excel at extreme speeds with a fraction of the power consumption of digital processors, making them ideal for high-speed sensor data processing.
Savings in AI Algorithms: When training and running Large Language Models (LLMs), analog accelerators can reduce energy consumption by 100$\times$ to 1000$\times$ compared to traditional digital GPUs.
3. The Hybrid Approach
In practice, pure general-purpose analog computers do not exist today. Modern architectures rely on hybrid systems:
ADC and DAC Converters: Converting analog signals from sensors to digital values and vice versa is critical. These converters are themselves a major bottleneck for energy consumption.
Task Division: The analog part quickly and efficiently processes massive matrix operations (like image or speech recognition), while the digital processor handles precise control, data storage, and communication.
Industrial Application: This efficiency is highly valued in modern smart grids, advanced edge-computing sensors, and real-time machine monitoring systems where power budgets are strictly limited.